1. Field of the Invention
The present invention relates generally to an FET oscillator based on a field-effect transistor, and more particularly, to an oscillator which is simple in arrangement and exhibits an excellent oscillation characteristic.
2. Description of the Prior Art
A prior art oscillator employing a field-effect transistor (hereinafter referred to as the FET) as a microwave FET oscillator is shown in FIG. 1. Explanation will first be made as to the prior art of FIG. 1 for better understanding of the present invention.
Referring to FIG. 1, an FET circuit 1 has a pair of terminals 4.sub.1 and 4.sub.2 connected with a resonant circuit 2 and the other pair of terminals 5.sub.1 and 5.sub.2 connected with a matching circuit 3, an oscillation output being generated at a pair of output terminals 6.sub.1 and 6.sub.2. The resonant circuit 2 is made up of transmission lines 8 connected at one end with a resistance 9 as a dummy load and a dielectric resonator 7 electromagnetically coupled with the lines 8, in order to obtain a stabilized oscillation output or frequency.
In the microwave FET oscillator shown in FIG. 1, assume that the FET circuit 1 has S parameters S.sub.11, S.sub.12, S.sub.21 and S.sub.22, in which r.sub.1 denotes the reflection coefficient of the resonant circuit 2 as viewed from the terminal pair 4.sub.1 and 4.sub.2, and .GAMMA..sub.D denotes the reflection coefficient of the FET circuit 1 as viewed from the terminal pair 5.sub.1 and 5.sub.2. Then, the reflection coefficient is expressed as ##EQU1## For the microwave FET oscillator to oscillate, .vertline..GAMMA..sub.D .vertline. must be greater than 1. Therefore, if the S parameters of the FET circuit 1 are given, .vertline.r.sub.1 .vertline. will have a minimum of .vertline.r.sub.1 .vertline..sub.min under the condition of .vertline..GAMMA..sub.D .vertline.&gt;1.
On the other hand, FIG. 2 is a curve 10 showing a relation of .vertline.r.sub.1 .vertline. with respect to a distance d (see FIG. 1.) between the dielectric resonator 7 and the lines 8, wherein the maximum distance d.sub.max corresponds to .vertline.r.sub.1 .vertline..sub.min.
For the oscillator employing the dielectric resonator 7, Q-values of the resonator with and without an external load, i.e., Q.sub.ext and Q.sub.o must be increased for a better frequency stability, whereas the smaller the distance d is the smaller the values Q.sub.o and Q.sub.ext are. More specifically, in order to stabilize the frequency of the oscillator, it is desirable to increase the distance d (d&lt;d.sub.max), but .vertline..GAMMA..sub.D .vertline. will correspondingly become smaller as seen from FIG. 2 and equation (1), which results in that its oscillation tends to be difficult to occur and its output level is reduced. From the above consideration, if such an FET circuit 1 can be realized which has a small value of .vertline.r.sub.1 .vertline..sub.min and yet satisfies the oscillation requirement, then easy oscillation and stable frequency can both be achieved.
In general, three common circuit configuration; common-source, common-gate, and common-drain configurations, have been used in microwave oscillators employing a GaAs FET. On the other hand, an enclosure used to package an FET usually has a construction as shown in FIG. 3. That is, a gate 12, a drain 13 and two sources 14.sub.1 and 14.sub.2 of the FET extend out of a body 11 of the packaging enclosure, and an upper face 15 of the enclosure body 11 is kept at the same potential as the sources 14.sub.1 and 14.sub.2 by means of a metallic pattern 16 provided on a side wall of the body. The FET package with such a structure is desirable for a common-source configuration and further in providing its input and output circuits because the gate 12 is aligned linearly with the drain 13.
With a package of such a structure, on the other hand, when it is desired to employ a common-gate or common-drain configuration, the resonant circuit must be disposed at a right angle with respect to the matching circuit on the output side, involving such difficulties that the circuit arrangement becomes complex and unnecessary oscillation tends to occur due to mutual interference between the lines.
Next, more detailed explanation will be directed to an arrangement of a prior-art common-source FET oscillator shown in FIG. 4 wherein parts already described in FIG. 1 are denoted by the same reference numerals. In FIG. 4, as in FIG. 1, the FET 1 has the pair of terminals 4.sub.1 and 4.sub.2 connected with the resonant circuit 2 and the other pair of terminals 5.sub.1 and 5.sub.2 connected with the matching circuit 3, an oscillation output being generated at the pair of output terminals 6.sub.1 and 6.sub.2. However, the FET circuit 1 in FIG. 4 is configured differently from that in FIG. 1. That is, an FET 21 has a source 22, a gate 23, and a drain 24. To the gate 23 a bias voltage V.sub.G is applied from a terminal 26 through an RF choke 28, whereas to the drain terminal 24 another bias voltage V.sub.D is applied from a terminal 25 through an RF choke 27. Further, between the gate 23 and the drain 24, there is a feedback network 17 consisting of an inductor 18 and a capacitor 19 for blocking D.C. signals. Capacitors 29 and 30 having the same function as the capacitor 19 are provided respectively between the terminal 4.sub.1 and the resonant circuit 2 as well as between the matching circuit 3 and the terminal 6.sub.1.
The FET circuit 1 in FIG. 4, has different values in its S parameters depending upon whether the feedback network 17 is included or not. By calculating a value .vertline.r.sub.1 .vertline..sub.min satisfying the relation .vertline..GAMMA..sub.D .vertline.=1 on the basis of the S parameter values which differ depending on the presence or absence of the feedback network 17, it has been found that addition of the feedback network 17 in the FET circuit 1 provides a smaller value for .vertline.r.sub.1 .vertline..sub.min. This means that, even if the distance d indicated in FIG. 2 is increased, a stable oscillation can be obtained.
As explained above, in the prior-art grounded-source FET oscillator, the feedback network 17 is placed between the gate terminal 23 and drain terminal 24 of the FET 21 in order to provide a stabilized oscillation. However, such a prior art oscillator has problems in that the feedback network 17 must be provided outside of the FET packaging enclosure and thus the circuit configuration becomes complex and the feedback frequency range becomes narrow, and further in that it is necessary to apply two types of bias voltages, i.e., the positive voltage V.sub.D to the drain 24 and the negative voltage V.sub.G to the gate 23.